Alok Dubey
Design Verification @NXP Semiconductors
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WORK HISTORY
Design Verification @NXP Semiconductors
San Francisco, CA, US
EDUCATION
Indian Institute of Information Technology (IIIT).
M.Tech., VLSI Design
ABOUT ALOK DUBEY
I am working in ASIC Design Verification (DV) domain. PROFESSIONAL SUMMARY: I have 12+ years of experience in Design Verification(DV) domain and having M.Tech.(VLSI Design) Strong experience on SOC level verification, IP level verification and Block level verification Strong experience on test benches based on System Verilog (SV), Universal Verification Methodology (UVM) and C/C++ Strong experience on developing verification plan, constraint random and coverage driven test benches, test cases, and functional coverage model Strong experience on system verilog Assertion-based verification (ABV) Strong experience on system verilog constraint random verification (CRV) & coverage driven verification (CDV) Strong experience on debugging, finding bugs, coverage analysis and coverage closure Strong experience on RTL level verification Strong experience on Gate level verification Strong experience on low power verification using UPF Experience on Module/Block/IP/Sub System/System/ASIC/SOC Verification Experience on Verification IP (VIP) development Experience on Third Party Verification IP integration and uses in SOC test benches Experience on Static formal verification Experience on Clock domain crossing (CDC) Verification Experience on Analog & Mixed Signal (AMS) Verification Experience of working in the following technological domains: ARM processor-based SOC, WI-FI 802.11, PCI Express, AMBA AXI, AMBA AHB, AMBA APB, I2C, SPI, GPU, DDR, SAS, SATA, NVME, Ethernet std 802.3), HDMI, DisplayPort (DP) Experience of having successful tape out of multiple chips.SKILLS: HVL: System Verilog Methodology: UVM, VMM, OVM Other languages: Verilog, C/C++, SVA, UPF, SPICE, System C, VHDL Scripting: Shell, Perl, Makefile EDA Tools: Cadence Xcelium, Synopsys VCS, Mentor Questasim, Debussy/Verdi, IMC, VManager. JasperGold, Conformal, Formality, Certitude Project management Tools: SVN, CVS, GIT, SOS Bug Management Tools: JIRA, Bugzilla; OS:Linux/UnixEDUCATION: Degree: M.TECH.(VLSI Design) Institute: Indian Institute of Information Technology India.
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