Ali Moaz

Digital Design Engineer @Marvell Technology

Pavia, IT

Digital circuit design and optimization (power, timing, area) of digital signal processing blocks and other subsystems (e.g: state-machines, microprocessor subsystems, high performance memory interfaces)Block level and top-level functional simulations and verificationSupport functional coverage.Coverage analysis, lint, and CDC analysisSupport for backend in timing closure, develop timing constraints and exception Develop block level assertions - Debug issues in netlist verification (post layout simulation: 0 delay, SDF simulations)Front-end design of complex multi clock domain blocksDFT design of block/sub-system under responsibilityPhysical implementation exploration including floorplan, placement, clock tree synthesis, explorative timing closure.Support for evaluation and verification of silicon - Documentation (Datasheet sections, design reports)Overtaking and improving existing solutionsCooperate with the other teams on continuous improvement activities!Performs other related responsibilities as required.