Alex Yourovski
Fpga Design Engineer @Teledyne Photometrics
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WORK HISTORY
Fpga Design Engineer @Teledyne Photometrics
US
Working on scientific sCMOS sensor based cameras. Mostly using Altera/Intel FPGA: Arria V, 10 and Cyclone V. Developing different modules for whole camera system. Using Quartus/Pro Modelsim and Active HDL.
EDUCATION
Belarusian State University
Masters of Science, Electronics, Physics
SKILLS
ABOUT ALEX YOUROVSKI
FPGA Design and Application Engineer.Started my career as a digital ASIC designer. Later moved to FPGA/CPLD design and acquired expert level of knowledge of FPGA design flows and tools. In the process of working on different systems with many customers acquired solid system design expertise. Demonstrated excellent system-level debug skills.A sample of created IP cores- Asynchronous general purpose 16-bit microprocessor- AES encryption/decryption module- GOST encryption/decryption module- Frame-grabber for a set of digital scientific cameras- NAND Flash Memory Controller
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