Alex Cuaresma

About Alex Cuaresma

17 years experience on layout design using Cadence Allegro PCB Design, Orcad Capture and HDL.Designed Tester Boards for Intel, Microchip, Dialog Semiconductor, Infineon Technologies, Cobham, Maxim Integrated and lots of Integrated Circuit manufacturers-Designed multiple layer board of up to 34 layers with up to 5 layer of laser vias-Designed High Density Interconnect(HDI) boards with combinations of Laser, Thru, and Burried vias-Designed high complexity board with the highest fabrication house capability to meet costumer requirements.Designed Desktop, Notebook and Server boards for major Computer companies such as Intel, HP, Dell, Acer and other computer manufacturers-Experienced designing small multi-layer boards such as PCI and graphics cards-Lead up to 7 man team in accomplishing different boards depending on the complexity of the design-Experienced Designing Complex boards having multiple processors (I5, I7 series with 4 and 8 Core), 32 DDR DIMM slots of memory capacity, and multiple layered boards-Designed Boards with mixed signals, Analog, Digital and RF-Routed, Tuned Signals such as; Audio, QPI, CSI, HT, DDR3, PCI, USB, I/O signals-Experience different kinds of routing from orthogonal, arc and degree routing-Extensive knowledge on Constraint Manager manipulation-Basic knowledge on SKILL programming to simplify process and standardize procedures-Knowledge of Board Fabrication Process-Knowledge on strategies to create less expensive design without compromising board quality.

Experience

1. Interface Design Engineer

   Teradyne

   Mar 2016 — Present

   Design ATE boards such as tester boards, site assembly and interface boards for Teradyne Testers. Design Interface boards for Teradyne costumers; boards used to test their newly manufactured IC’s. Create Schematic on Orcad or HDL base on given pinlist which might be on form of PDF or Excel.Create schematic and allegro symbol for new components that do not exist in library.Perform task from Design In, Placement, Routing, Length Matching, Modifications to Artwork Film creationResponsible for Post-Gerber Process such as Final Checking of artwork films, preparation of files for archiving, filling of all related documents and material used in the design processStudies and follows design guides from chipset vendors carefully for design applicationsWorks with R&D Engineers to comply for an issue that concerns function and signal integrityCollaborates with overseas Test Engineers during trace routing stage, power plane separations, technical assistance, checklist and guidelines to finish the project at the distinct time.Follows design Checklist to meet operation standards, speed and qualityCreate skill program that can be used to have standard on board designs.Create skill program to simplify repetitive process in doing board layout.

Education

• Saint Louis University (PH)

  Bachelor of Science (BS), Electronics and Communications Engineering

  2002 — 2007

Skills

• Organizational Leadership
• Integrated Circuits (Ic)
• Semiconductors
• Leadership
• Ic
• Electronics
• Manufacturing
• Testing
• Electrical Engineering
• Communication
• Rf
• Orcad
• Signal Integrity
• Analog Circuit Design
• Fpga
• Skill Programmer
• Mixed Signal
• Circuit Design
• Schematic Capture
• Engineering
• Design for Manufacturing
• Analog
• Entrepreneurship
• Allegro
• Pcb Design
• Debugging
• Engineering Management
• Product Development
• Eda