Alec Bender
MS ECE @ CMU | CPU Physical Design & Integration Intern at IBM
- Role
- Cpu Physical Design and Integration Intern at IBM
- Location
- Austin, TX, US
- LinkedIn followers
- 500 followers
About Alec Bender
Hi, I\'m Alec, a CPU Physical Design Engineer on the z-series L3 cache team at IBM in…
Experience
Cpu Physical Design and Integration Intern
May 2025 — Present · Austin, TX, US
Optimized floorplan, placement, and timing for the z18 L3 cache using IBM’s internal physical design flow• Closed critical timing violations by developing custom tools to minimize routing detours, reducing worst slack by 86%• Enhanced routability by using underutilized lower metal, lowering congestion (wACE4) and total negative slack by 40%• Implemented Python tool to track latch shifts post-hierarchical flattening, exposing anomalies across octword regions
Education
Carnegie Mellon University
Master of Science - MS, Electrical and Computer Engineering
New Trier High School District
High School Diploma
2016 — 2020
University of Chicago
Molecular Engineering
2019 — 2019
Carnegie Mellon University
Bachelor of Science - BS, Electrical & Computer Engineering, Materials Science & Engineering, Minor in Electronic Materials
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