Alan Ren
Principal Engineer
- Role
- Principal Engineer at Cisco
- Location
- San Jose, CA, US
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Principal Engineer
Apr 2021 — Present · San Jose, CA, US
High speed ADC/DAC/PLL/Clocking architecture and circuit design for coherent communication, 56G/112G PAM4 Serdes.
Education
Chinese Academy of Science
Master of Science (MS), Electrical and Electronics Engineering
Zhejiang University
Bachelor of Science (B.S.), Electrical and Electronics Engineering
Stanford University
Analog design certificate, Electrical and Electronics Engineering
2003 — 2004
Skills
- Drc
- Asic
- Pll
- Serdes
- Spectre
- Semiconductors
- Rtl Design
- Cmos
- Physical Design
- Analog
- Analog Circuit Design
- Vlsi
- Lvs
- Ic
- Cadence Virtuoso
- Integrated Circuit Design
- Mixed Signal
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.