Akshay Likhar
Design Verification Engineer at Qualcomm
- Role
- Sr Lead Design Verification Engineer at Qualcomm
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Akshay Likhar
A Graduate of a Master\'s Degree in Electrical Engineering (MSEE) from The University of Texas at Dallas with an interest in the field of VLSI Design(RTL/Logic/Physical), Analog/Mixed signal Design, FPGA/ASIC Design, Design for Testability and Verification. Currently seeking a Full-Time Opportunities to utilize my skills and academic hands-on experience contributing towards the development of the organization and to leverage my career.TECHNICAL AREAS OF EXPERTISE:• HDL/Programming Languages: Verilog HDL, System Verilog, OVM, UVM, C++, C, VHDL, Java, SQL, MATLAB, HTML• CAD/EDA tools: VCS, Verdi, Xilinx Vivado/ISE, Modelsim, Synopsys Design Compiler, Digilent Adept, Design Vision, Cadence Virtuoso, Encounter, SiliconSmart, Primetime, Liberty NCx, HSpice, Code Composer Studio, Tetramax, Cplex etc.• Operating System : Unix/Linux, Windows.• Development Board: Zybo ARM/FPGA SoC Board, Basys 2 Spartan-3E FPGAPERSONAL SKILLS:Leadership.Cultural Intelligence. Analytical problem solving skillsExcellent communication skills
Experience
Sr Lead Design Verification Engineer
Nov 2024 — Present · Bengaluru, IN
Education
The University of Texas at Dallas
Master of Science (M.S.), Electrical and Electronics Engineering
2015 — 2017
G. H. Raisoni College of Engineering, Nagpur.
Bachelor’s Degree, Electronics and Telecommunication
2010 — 2014
Skills
- Verilog
- Fpga
- Microsoft Word
- Application-Specific Integrated Circuits (Asic)
- Cadence Virtuoso
- H-Spice
- C
- Programming
- Sql
- Synopsys Tools
- Dbms
- Matlab
- Html
- Testing
- Cplex
- C++
- Vhdl
- Microsoft Office
- Tetramax
- Microsoft Excel
- Java
- Python
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