Akshay Desai
Member of Technical Staff - Silicon Design at AMD
- Role
- Mts Silicon Design Engineer at AMD
- Location
- Santa Clara, CA, US
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Akshay Desai
Physical Design Engineer with a Master\'s Degree in Electrical Engineering(VLSI) from…
Experience
Mts Silicon Design Engineer
Jul 2022 — Present · Santa Clara, CA, US
Education
SDM College of Engineering and Technology
Bachelor of Engineering (B.E.)
2009 — 2013
University of Southern California
Master's Degree
2014 — 2016
Skills
- Verilog
- C++
- C
- Perl
- Cryptography
- Asic
- Cadence Virtuoso
- Physical Design
- Modelsim
- Xilinx Ise
- Parallel Computing
- Functional Verification
- Multithreading
- Cpu Microarchitecture
- Vhdl
- Network Security
- Dft
- Computer Architecture
- Rtl Design
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