Akshay Sreeraj
SoC Design Engineer at Intel
- Role
- Soc Design Engineer at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Soc Design Engineer
Jul 2017 — Present
Education
PSG College of Technology
Master of Engineering (M.Eng.)
2015 — 2017
edX
Solar Energy Technology
2013 — 2013
University of Calicut
Bachelor of Technology (B.Tech.)
2010 — 2014
Skills
- Rtl Design
- Xilinx Ise
- System Generator
- Linux
- Cadence Virtuoso
- C++
- C
- Perl
- Eda
- Microsoft Office
- Cadence Encounter
- Semiconductors
- Red Hat Linux
- Tanner Tools
- Rtl Verification
- Altera Quartus
- Verilog
- Application-Specific Integrated Circuits (Asic)
- Latex
- Windows
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