Akshay Gupta
Hardware Engineer at Google
- Role
- Hardware Engineer at Google
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Akshay Gupta
Lead STA function of full chips. Deployed company first flows for ECO, STA, Margining FlowsHave End to End understanding of timing margins and derivation methods.
Experience
Hardware Engineer
Oct 2020 — Present · Bengaluru, IN
Working on the latest Tensor SoCs. Partition STA lead : constraints, timing signoff, ECO STA Sign-off Methodology Lead : corner optimisation, margin derivation - ocv, reliability, clock margins, emir handshake, robustness flows, custom signoff checks, vtskew checks, clock jitter,and checklists. Also optimising the ECO flows for best Timing and Power.
Education
Dhirubhai Ambani Institute of Information and Communication Technology
Bachelor's Degree, Information Communication Technology
2008 — 2012
St. Joseph's Academy
Intermediate, Science
1996 — 2008
Skills
- Vlsi
- Synthesis
- Synopsys Primetime
- Tcl
- Timing Closure
- Static Timing Analysis
- Formal Verification
- Constraint Development
- Encounter Power System
- Qrc
- Tweaker
- Ip Constraints Integartion
- Power Analysis
- Asic
- Basic Understanding of Cts Spec File
- Tempus
- Parasitic Extraction
- Conformal Lec
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