Akshata Kotihal
Analog Layout Engineer at Intel Corporation
- Role
- Analog Layout Engineer at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Akshata Kotihal
AMS layout engineer-5+ years of experience on 28nm,45nm and 180nm techonology and worked on Analog layout for foundary like tsmc,intel-worked on PLL layouts from scratch-work involved designing and leading of layout of all PLL blocks like TDC, DCO etc from scratch, placement and routing to meet critica constraints like current rating, EM and IR-Physical verification(DRC and LVS)-Tools layout tool:virtuoso layout editor/XL verifications tools:calibre for LV and totem(RV)
Experience
Analog Layout Engineer
Nov 2018 — Present · Bangalore, IN
Overall I have 5+ years of experience, with INTEL it’s been 4+ years of experience. I have been working in PLL blocks from past 4 years(includes the process like n5,n3, intel 14nm,10nm,7nm)
Education
Sri dharmastal majunatheshar college of engineering n technology..dharwad
Bachelor of Engineering (B.E.)
2011 — 2015
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