Akhilesh Reddy

Sr Silicon Design Engineer @AMD

Project 1: STA Team (5nm+):\\\\nRoles and Responsibilities\\\\n· Owner of Functional constraints of full chip of a DPU chip. Responsibilities include constraints development, constraints verification and validation with help of the designers.\\\\n· Worked on MTBF validation, CDC checks.\\\\nProject 2: STA Team (5nm):\\\\nRoles and Responsibilities\\\\n· Owned a couple of timing critical clocks and drived them to closure.\\\\nProject 3: STA Team (5nm+):\\\\nRoles and Responsibilities\\\\n· Owner of Functional constraints of Graphics module. Responsibilities include constraints development, constraints verification and validation with help of the designers.\\\\n· Worked on MTBF validation, CDC checks.\\\\n \\\\n\\\\n \\\\n \\\\n\\\\n \\\\n