Akhilesh Gupta
Sr. Layout Design Engineer DEG
- Role
- Senior Layout Designer at Micron Technology
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Akhilesh Gupta
Working as Layout Engineer for SRAM4.5 years of Technology Exposure of different FINFET down to 3nm for the multiple leading foundries (Intel/TSMC/ Samsung/Dongbu).• Basic Understanding of Semiconductor Device Physics • Expertise in floor planning, placement, routing and verification against the schematic design. • Understanding of different validations check such as DRC, LVS, ERC, IR, EM, DFM, Parasitic Extraction etc and other foundry specific validations on memory chips instances.• Applying layout engineering aspects to design such as cross talk shielding, Interdigitation, Common centroid matching, Plasma Induced antenna effect, Power Gating schemes, RC extraction and analysis, multiple patterning, Read Assist, Write Assist,Latch up, and Reliability checks mainly IR & EM.• Full Custom layout / Standard Cell Layout development.• Understanding of Analog and Digital IC Designfamiliar with scriptin
Experience
Senior Layout Designer
Mar 2024 — Present · Hyderabad, IN
Education
Saraswati Shishu Mandir Higher Secondary Chandla Chhatarpur Mp
BE, Electronic & communication
2011
MITS Gwalior India
Master of Technology (M.Tech.), Microwave engg.
2011 — 2013
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