Ajay Nath
Distinguished Engineer, CPU Design
- Role
- Distinguished Engineer, Cpu Design at Cadence
- Location
- Falls Church, VA, US
- LinkedIn followers
- 500 followers
Experience
Distinguished Engineer, Cpu Design
May 2022 — Present
Education
University of Louisiana at Lafayette
MSCE, Computer Engineering
1990 — 1992
The Doon School
High School
1977 — 1984
Nagpur University
BSEE, Eelectrical Engg
1984 — 1988
Skills
- Perl
- Eda
- Debugging
- Verification Strategy
- Very-Large-Scale Integration (Vlsi)
- Computer Architecture
- Processors
- C
- Asic
- Test Case Generation
- Scripting
- Functional Verification
- Verilog
- Microprocessors
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