Ajay Kudikala
Analog Layout Design Engineer @SmartSoC Solutions Pvt Ltd
Hyderabad, TG, IN
EMAILS
MOBILE NUMBERS
+91 *********19
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WORK HISTORY
May 2022 — Present
Analog Layout Design Engineer @SmartSoC Solutions Pvt Ltd
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Hubli, IN
EDUCATION
2022 — 2024
Birla Institute of Technology and Science, Pilani
Master of Technology - MTech
2017 — 2021
Vardhaman College of Engineering (VCEH)
Bachelor of Technology - BTech
2015 — 2017
Sri Gayathri Junior College
INTERMEDIATE
2009 — 2015
St. Gabriel's High School, Kazipet
Secondary School of Education
ABOUT AJAY KUDIKALA
Analog Layout Engineer
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