Ajay Gupta

Analog and Mixed Signal Layout Design Engineer@Intel | Technology Development

Role
Layout Design Engineer at Intel
Location
Bengaluru, KA, IN
LinkedIn followers
500 followers

About Ajay Gupta

Hey Everyone, Thanks for visiting my profile. If I will express myself that should be silent and exuberant.

Experience

  1. Layout Design Engineer

    Intel

    Nov 2023 — Present · Bengaluru, IN

    Working as mask design engineer of advanced memories at lower technology node. Working on full custom design flow. Responsible to delivered custom design blocks including Placement, routing with clean LVS, DRC.Hands on experience on Memory blocks including control block row and column decoder with bit array.

Education

  • Sharda University

    Bachelor of Technology - BTech, Electrical, Electronics and Communications Engineering

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Ajay Gupta — Layout Design Engineer at Intel in Bengaluru, KA, IN | Unifers