Ajay Devulla

Senior Technical Dv Consultant @NXP Semiconductors

Düsseldorf, DE
MOBILE NUMBERS
+91 *********19

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WORK HISTORY

Mar 2026 — Present

Senior Technical Dv Consultant @NXP Semiconductors

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Leuven, BE

EDUCATION

1998 — 2002

M S Ramaiah Institute of technology

BE, Electronics Engineering

SKILLS

Assertion Based VerificationMicroprocessorsVerilogRtl DesignArmNcsimOpen Verification MethodologyArm ArchitectureTclVmmPattern MakingLogic SynthesisDebuggingGate Level SimulationFunctional VerificationSystemcSystemverilogApplication-Specific Integrated Circuits (Asic)Very-Large-Scale Integration (Vlsi)PerlEdaAsicSystem VerificationSilicon ValidationAmba AhbSocStatic Timing AnalysisVlsiSystem on a Chip (Soc)I2c

ABOUT AJAY DEVULLA

Core competency in system-level verification and validation of complex ASICs and SOCs• Involved in multiple successful tape-outs of multimillion gate IC’s• Works related to PCIe, CXL, Mixed-signal automotive IC’s, SOC’s with ARM processors, QDR-II, DDR-II, SPI-4.2, PCI 2.2, Ethernet, AMBA, I2C, E-Fuses, Encryption Algorithms• Proven ability in building and leading small teams and managing external contracting tasks• Substantial know-how and experience in multiple development phases of ASIC/SOC - Design and Verification - Synthesis and Timing Analysis - Gate level simulations - Silicon validation - Debugging field return IC’s and Test pattern generation - Technical documentation• Possess twenty plus years of rich experience in VLSI industry • Experienced in coordination with firmware/software teams for SOC’s LLD development • Have been quick in taking up new roles/responsibilities and integrate with teams in short time, backed by good interpersonal skills

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