Ajay Dash

Engineer SW/HW

Role
System Validation Engineer at Intel
Location
Bengaluru, KA, IN
LinkedIn followers
500 followers

About Ajay Dash

RTL Design with VHDL/Verilog/SV for IP, SOC integration /prototype Expertise in embedded SW development with ST-Micro / NXP / Beagle bone / Raspberry pi boards System Modelling with SystemCExperience with Virtual Platform SIMICSExperience with OpenCL/ CUDA for heterogeneous parallel computing / acceleratorsDesign/ Verification / Validation of block level (functional), System level, Use case scenarios.Verification Env/TB development System Verilog, Vera -UVM/OVM/RVMExperience in Pre-Silicon / Post-Silicon design Verification Validation Experience with VxWorks / FreeRTOS development & portingAssembly Language for x86, 8051, ARM, ARC, RISC-VROS and Robotics experience Experience in GUI based application development with VC++/ PythonExperience -ASIC prototype/Hard ASIC Xilinx/Altera FPGA Vivado/ISE/QuartusMatlab/Octave based ENV for design/verification & DSP algorithmsLisp, used for AI ALGO development optimization3G, LTE as a part of training in QCOM, INTL Scripting expert with Perl, Shall, Python, LuaExpertise in data structure and program design C++/Java/PythonExperience in Device Driver Development for Linux/WindowsExperience in Emulation for ASIC using Rumi [Qcom], Zebu [SYNPS]Experience in Multimedia & Graphics based designExperience in Verilog AMSExperience in Assertion based Verification using SV [Jasper /0-in ]LTE cat6/9/1 thin modem SOC verificationLow power verification with UPF ObjectiveC/SWIFT/Lua for iOS application development Experience in Android application development Java/C++(NDK)/KotlinProject Management, milestone/work flow review & goal track Coordination from sites in India, US, Sweden, Germany, Japan & China Key performance Index and merging them with the progress flowLeadership skills for handling different size teamsWorked for speech recognition (HMM) & edge detection (canny, sobel etc) & Human-computer interface during MastersExperience in Qemu, Device Driver, understanding Linux kernel, TF AI/ML/DL Specialties: C, C++,VC++, VHDL, Vera, System Verilog, RVM, OVM, UVM,VxWorks, Embedded Linux,FreeRTOS, Micro-controller based design, Matlab, Python, Mobile apps dev, device driver development, Swift, java script, GO

Experience

  1. System Validation Engineer

    Intel

    Mar 2021 — Present · Bangalore Urban, IN

    Worked for virtual HW C/C++ Simics and PythonSV codes, LinuxSV (Debian flavor) worked for the debug in SLE/HSLE with SystemC on custome development boards.

Education

  • Indian Institute of Technology (Banaras Hindu University), Varanasi

    MTech, Digital Techniques

    1999 — 2003

Skills

  • Telecommunications Engineering
  • Arm
  • Vhdl
  • X86
  • Functional Verification
  • C++
  • Soc
  • Rtl Design
  • Microcontrollers
  • Debugging
  • Asic
  • Assembly Language
  • Xilinx
  • Systemverilog
  • Lte
  • Vxworks
  • Python
  • 3g
  • Visual C++
  • Open Verification Methodology
  • Altera
  • Acoustic Guitar
  • Vera
  • Verilog
  • Perl
  • Eda
  • Android Development
  • Robotics
  • Vlsi
  • Lisp

Find verified contacts for anyone on LinkedIn

Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.

Free plan included · No credit card required

This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.

Ajay Dash — System Validation Engineer at Intel in Bengaluru, KA, IN | Unifers