Ajay Chintalapati
- Role
- Physical Design Engineer (Sta) at Apple
- Location
- San Diego, CA, US
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Ajay Chintalapati
Hi I have graduated from USC in Electrical Engineering with an honors degree. Fight
Experience
Physical Design Engineer (Sta)
Feb 2022 — Present
Skills
- First Encounter
- Dft
- Rtl Design
- Asic
- Vhdl
- Static Timing Analysis
- Keil
- Pcie
- Linux
- Chipscope Pro
- Xilinx Ise
- Synopsys Primetime
- C++
- Vlsi
- System Verification
- Design Verification Testing
- Verilog
- Amba
- Windows
- C
- Fpga
- Perl
- Semicon
- Amba Ahb
- Electrical Engineering
- Synopsis
- Computer Ar
- Cadence Virtuoso Layout Editor
- Conformal Lec
- Cadence Virtuoso
- Physical Design
- Matlab
- Microsoft Office
- Modelsim
- Uvm
- Cadence Spectre
- Rtl Verification
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