Aishwarya Tadkase
Logic Design Engineer
- Role
- Logic Design Engineer at IBM
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Aishwarya Tadkase
FPGA Design Engineer with 2+ years of experience in RTL design and verification using Verilog. Experience with protocols such as SPI, UART, I2C, Xilinx DDR3 MIG and USB3.0 to FIFO Bridge. Developed arithmetic units for performing Single Precision Floating Point operations conforming to Standard for Floating Point Arithmetic. Implemented signal processing algorithms on Xilinx Artix and Kintex 7series FPGAs.
Experience
Logic Design Engineer
Dec 2021 — Present · Bangalore Urban, IN
Education
National Institute of Electronics and Information Technology (NIELIT), Calicut,India
Master of Technology - MTech, VLSI and Embedded Systems
2018 — 2019
Defence Institute of Advanced Technology (DIAT), DU, DRDO
Master of Technology - MTech, VLSI and Embedded Systems
2017 — 2018
St. Philomena Convent High School, Nashik, Maharashtra
High School, Secondary Education
1998 — 2010
Savitribai Phule Pune University
Bachelor of Engineering (B.E.), Electrical, Electronics and Communications Engineering
2012 — 2016
Maharashtra Institute of Technology
Engineer’s Degree, Electronics and Communications Engineering
2012 — 2016
Skills
- Management
- C++
- Matlab
- Xilinx Ise
- Public Speaking
- Microsoft Office
- C
- Market Research
- Research
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