Aishwarya Bhimashankar Halmandge

About Aishwarya Bhimashankar Halmandge

I believe VLSI isn’t just about circuits—it’s about building the future, one transistor at a time.As an M.Tech student specializing in VLSI Design, I’ve learnt the tools, techniques, and principles that power modern electronics. From RTL coding and verification to physical design and timing analysis, I’m ready to apply what I’ve learned to real-world projects that push the boundaries of silicon innovation.What I bring to the table: Digital Design & RTL Coding – Strong foundation in Verilog Functional Verification – Hands-on with UVM, Testbenches, Coverage, Assertions Low Power Design – Familiar with Clock Gating, Power Gating techniques Timing Analysis – Good understanding of STA, setup/hold time, slack, and clock tree EDA Tools – Exposure to Cadence, Synopsys (Design Compiler), Mentor Graphics Scripting – Python, Tcl, Shell scriptingProjects & Academic Work:Designed and implemented a high-speed SERDES (Serializer/Deserializer) block from RTL (Register Transfer Level) to GDSII (final chip layout) Designed and simulated a 5-stage pipelined processor based on the MIPS architecture using Verilog • Designed and Modelled 5nm FinFET on Synopsis TCAD and done optimization for lower power applications Design and implementation of a low-power, high-performance 1-bit full adder using the Gate Diffusion Input (GDI) technique.I’m looking for a team where I can contribute, learn, and grow—while delivering real value on cutting-edge projects.

Experience

1. Digital Design Intern

   NXP Semiconductors

   Jan 2026 — Present · Bengaluru, IN

Education

• Vellore Institute of Technology

  Master of Technology - MTech, VLSI Design

• Christ University, Bangalore

  Bachelor of Technology - BTech, Electronics and communication engineering

  2018 — 2022