Aishwarya Ganapathy Subramaniam

WORK HISTORY

EDUCATION

SKILLS

ABOUT AISHWARYA GANAPATHY SUBRAMANIAM

Expert in Silicon Power-On, Post Silicon HVM Test Program Integration, Validation & Failure analysis with a demonstrated history of working in the semiconductor industry. Strong engineering and professional experience with a master’s degree in Electrical Engineering from Rochester Institute of Technology with a focus on Computer Architecture and Digital Circuit Design. I am recognized for my strong failure analysis skills on FPGA product families related to post-silicon manufacturing with emphasis on delivering successful production quality test programs on HVM ATE tester platforms at Intel factories.Leading HVM test Program Validation team for validating Intel FPGAs in architecting test solutions, conducting failure analysis, fault isolation, to resolve test instabilities and develop mitigation strategies.# Architect power equations, voltage switching, hardware protection limits, and operation conditions for part configuration per data sheet spec.#Agile/Scrum product owner to provide the team with goals and tasks for each sprint cycle, plan quarterly releasesProgramming and Scripting Languages: Python, UVM (basics), System Verilog.Other courses o Design of Digital Systems – VLSI design, timing closureo Advanced Topics in Digital Systems Design – Digital Systems design and fabrication, o Design and test of Multicore Chips - DFT, Silicon Verification and Validation