Shubham Aggarwal
PDN Analysis & Signoff Engineer
- Role
- Senior Engineer at Qualcomm
- Location
- Bengaluru, IN
- LinkedIn followers
- 500 followers
About Shubham Aggarwal
Silicon Engineer currently responsible for PDN EMIR signoff (IR-Drop Analysis) of Qualcomm High-Performance DSP Cores. Having a good fundamental knowledge of Power Integrity Analysis. Have worked on various IC integrity issues like Power Hotspots, IR drop, EM (Signal & Power) and ESD Analysis with a working knowledge of Scripting (Python, Linux, Perl & TCL). Perpetually increasing my skills in Physical Design, STA, and EM-IR Analysis, with good analytical skills and a willingness to learn.
Experience
Senior Engineer
Dec 2020 — Present · Bengaluru, IN
Worked as PDN EMIR Analysis and Signoff Engineer which includes Power Integrity analysis at Die and Package Level for High-Frequency Power Dense DSP Cores at Lower Technology Nodes. My role includes EMIR & ESD Analysis, Bump & RDL Planning, Resistance based Early Analysis, IR annotated Timing Analysis for Vmin Projections and Low Power Design PDN Simulations.
Education
YMCA University of Science & Technology, Faridabad
Bachelor of Technology (B.Tech.)
2016 — 2020
Birla Institute of Technology and Science, Pilani
Master of Technology - MTech
2022 — 2024
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