Austin F. Garrido

About Austin F. Garrido

As an experienced (16+ years) electrical/digital engineer with a passion for leadership, I provide value by leveraging my technical expertise and genuine nature to inspire and empower teams, driving innovation and achieving collective success. My unique blend of technical proficiency, leadership, interpersonal skills, and a sincere desire to bring out the best in people sets me apart from my peers, making me an invaluable asset for both engineering teams and organizations seeking transformative leadership.Leadership: Inspiring my team of 20 Engineers from just out of college to highly experience designers/fellows.Engineering: FPGA/Firmware/Digital Designs which required emulation, integration, and/or implementation. Design Tools: Vivado, Xilinx SDK, Matlab, KAYA Vision Point, Altium, Xilinx ISE Languages: Verilog, System Verilog, C++, C, VHDLHardware: VERSAL, VCU118, VU9P, Virtex Ultrascale+, Kintex Ultrascale, VC707, Virtex-7, Kintex-7, Zynq UltraScale+ RFSoC, Zynq UltraScale+ MPSoC, Abaco Systems: VP869 6U VPX Dual UltraScale+ FPGA and ADC/DAC cards (FMC163 and FMC170), Analog Devices ADC/DAC FMCDAQ2, Kaya CoaXpress Card and Frame GrabberRelated & pq-category-2=students-https://poetsandquants.com/2024/07/07/best-brightest-online-mbas-class-of-2024/Additional Achievements -(Pending) 4 digital design patents developed at HRL: One granted in 2022, Second granted 2024-Featured as University of Arizona’s Online MBA 2024 Best and Brightest-6 Recognition Awards from Raytheon: Missiles and Defense-Inducted into RTX\'s High Potential Talent Pool \"HiPot\"(2024)-1 of 2 HRL staff sent to attended the Xilinx Developer Forums for 2018 and 2019-Xilinx Training Class: Zynq UltraScale+ MPSoC (March 2019)-Designing with UltraScale FPGA Transceivers Xilinx Training Class (July 2019)-Featured in 9 published papers over work involving GaN Power devices and Algorithm Implementation on FPGAs-Member of (SHPE: Society of Hispanic Professional Engineer)-2025 Effector Digital Products (EDP) Department Onboarding Coordinator-Raytheon’s Foundations of Leadership Graduate -Program Management Certification Level 7 (PM7)-Earned Value (CAM) and Basis of Estimate (BoE) Certifications

Experience

1. Cross Product Team Cpt Lead Fpga Configurable Logic Execution and Development

   Raytheon

   Jul 2023 — Present · Tucson, AZ, US

   In this role, I serve as the primary leader for Configurable Logic development across multiple high-priority defense programs. I manage engineering teams of 8–12 professionals distributed across onsite and remote locations, ensuring that workloads are balanced, schedules are achievable, and resources are effectively aligned with program needs. Beyond day-to-day tasking, I am responsible for mentoring and coaching engineers at different experience levels, driving both their technical growth and professional development. My leadership approach emphasizes accountability, collaboration, and technical excellence, which has resulted in a measurable reduction in design defects and improved overall team a program execution perspective, I oversee all phases of the Configurable Logic lifecycle from requirements definition through design, implementation, verification, and integration. I work closely with cross-functional counterparts in systems, electrical, and software engineering to ensure seamless coordination and delivery of fully qualified solutions. My teams have consistently achieved on-time delivery of firmware milestones while simultaneously supporting urgent integration needs and evolving requirements. I frequently represent during program and customer-facing reviews, where I communicate technical status, risk assessments, and solutions to stakeholders, ensuring program transparency and strengthening customer confidence. While managing at the program level, I also maintain hands-on technical involvement, supporting complex debug activities in the lab and applying expertise in design analysis. As a result of my leadership, our team successfully delivered over 10+ FPGA designs, effectively resolved and debugged issues that had caused three product line halts, provided critical stop-gap support to maintain program continuity, and fostered professional growth within the team, leading to the well-deserved promotion of three team members.

Education

• University of Arizona, Eller College of Management

  Master of Business Administration - MBA, Management and Organizations

• California State Polytechnic University-Pomona

  Bachelor of Science; Bachelor of Science, Computer Engineering; Electrical Engineering

  2006 — 2010

• Granada Hills Charter

  High School Diploma

  2002 — 2006

• University of Southern California

  Master of Science - MS, Electrical Engineering

  2016 — 2018

Skills

• Microsoft Excel
• Microsoft Office
• Verilog
• C
• Fpga
• Java
• Matlab
• Computer Science
• C++
• Simulations
• Engineering
• Electrical Engineering
• Cracking Jokes
• Pcb Design
• Circuit Design
• Assembly
• Electronics
• Computer Hardware
• Making People Smile ^_^
• Getting the Job Done