Aditya Kalra

Hardware Engineering Intern @Arm

Manchester, GB

Working in the Solutions Engineering - SoC group, working on pre-silicon RTL verification for Arm Total Compute (TC) Systems. Currently working on completing memory map verification for Arm Large Screen Compute. Developed a template for conducting Memory System Resource Partitioning and Monitoring (MPAM) verification. Gained a deep understanding of CSS microarchitecture, memory controllers, system level cache, performance verification, stimulus generators, and QoS schemes. Employed simulation testbenches (written in SystemVerilog) and waveform analysis for effective debugging of pre-silicon RTL design. Gained exposure to the use of Linux kernels, Makefiles, scripting, AMBA bus protocols (AXI, CHI), UVM verification environments, and Verification IPs (VIPs).

NPS International School Singapore

International General Certificate of Secondary Education (IGCSE)

NPS International School Singapore

International Baccalaureate (IB), IB Diploma

University of Cambridge

BA and MEng, Engineering