Aditya Dinesh
- Role
- Soc Design Verification Engineer at Intel
- Location
- Hillsboro, OR, US
- LinkedIn followers
- 500 followers
About Aditya Dinesh
A student of modern uArch and advanced verification methods.
Experience
Soc Design Verification Engineer
Jun 2023 — Present
RTL Design and Verification for X-Chips(Enabling Intel Foundry Services).
Education
North Carolina State University
Master's degree, Computer Engineering
Vellore Institute of Technology
Bachelor of Technology - BTech, Electrical, Electronics and Communications Engineering
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