Adesh Gupta
Staff Verification Engineer | Qualcomm | Ex-NXP | Ex-Cypress | Bits Pilani
- Role
- Staff Design Verification Engineer at Qualcomm
- Location
- Faridabad, HR, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Adesh Gupta
ASIC Design Verification Engineer
Experience
Staff Design Verification Engineer
Nov 2025 — Present · Noida, IN
Education
The LNM Institute of Information Technology
Bachelor of Technology - BTech, Electronics and Communications Engineering
2010 — 2014
Birla Institute of Technology and Science, Pilani
M.E. COMMUNICATIONS ENGINEERING, Electrical, Electronics and Communications Engineering
2015 — 2017
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.