Adarsh Sinha
SoC Logic Design Engineer @ Intel | IIT Bombay | Institute Silver Medalist | MTech (RA) EE5 | Ex Sr Software Dev @ KPIT | Embedded Systems | Deeplearning
- Role
- System-on-chip Logic Design Engineer at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Adarsh Sinha
Loves to work at the crossroads of hardware and software to breathe life into lifeless…
Experience
System-on-chip Logic Design Engineer
Jul 2024 — Present · Bengaluru, IN
Education
Savitribai Phule Pune University
Engineer’s Degree, Electronics and Communications Engineering
2014 — 2018
Kendriya Vidyalaya
High School, Science
2013 — 2014
Indian Institute of Technology, Bombay
Master of Technology - MTech, Electronic Systems
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