Achyutha Shanmukha Murali
ASIC Design Engineer at Apple
- Role
- Asic Design Engineer at Apple
- Location
- Cincinnati, OH, US
- LinkedIn followers
- 500 followers
About Achyutha Shanmukha Murali
To be an astute learner and obtain a position in an industry that utilizes my skills andhelp me to grow in an environment where I can enrich my knowledge. Currently working on master\'s research on parameterized assertion generators for SoC architectures under the guidance of Dr.Ranga Vemuri, UC
Experience
Asic Design Engineer
Jul 2021 — Present · Cupertino, CA, US
Education
University of Cincinnati
Master of Science - MS, Electrical Engineering (VLSI Track)
Amrita University
Bachelor of Technology (B.Tech.), Electronics and Communications Engineering
2012 — 2016
Skills
- Systemverilog
- Questa
- Mipi Dphy
- Verilog
- Communicaion Sysytems
- Csi2
- Leadership
- Electronic Circuit Design
- Perl
- Linux
- Very-Large-Scale Integration (Vlsi)
- C
- Programming
- Microsoft Office
- Vlsi System Design
- System Verilog
- Functional Verification
- Digital Signal Processing
- C Shell Scripting
- Microcontrollers
- Windows
- Microsoft Word
- Electronics
- Logic Design
- Vhdl
- Strategic Planning
- C++
- Microsoft Excel
- Matlab
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