Achint Sharma

About Achint Sharma

Focused on 3DIC advanced packaging, including RDL fan‑out routing, package‑level EM/IR analysis, and building AI agents for 3DIC design automation and optimization.Brings extensive experience as a Physical Implementation Engineer across Place & Route, STA, Physical Verification, low‑power techniques, and signoff from 65nm to 3GAP. Strong background in automotive safety‑critical SoCs, full‑chip P&R, mixed‑signal backend flows, multi‑power domains, custom analog block routing, IO ring design, and Calibre‑based physical verification.

Experience

1. R & d Engineering Architect

   Synopsys Inc

   Apr 2026 — Present · Austin, TX, US

Education

• International Institute of Information Technology Hyderabad (IIITH)

  Master of Science (MS), Microelectronics & VLSI Design

  2007 — 2009

Skills

• Clock Tree Synthesis
• Power Analysis
• Static Timing Analysis
• Tcl
• Application-Specific Integrated Circuits (Asic)
• Physical Verification
• Soc
• Vlsi
• Lvs
• Floorplanning
• Fpga
• Asic
• Verilog
• Physical Design
• Vhdl
• Very-Large-Scale Integration (Vlsi)
• Timing Closure
• Eda
• System on a Chip (Soc)
• Semiconductors
• Integrated Circuit Design
• Modelsim
• Pnr , Sta , Ir Drop Analysis , Physical Verification
• Timing
• Drc