Aboli Sawant
Pre Silicon Verification Engineer @ Intel Corporation | Master\'s in Electrical and Electronics Engineering | UVM |
- Role
- Pre Silicon Verification Engineer at Intel
- Location
- Rancho Cordova, CA, US
- LinkedIn followers
- 500 followers
About Aboli Sawant
I am a Design Verification engineer at Intel Corporation, where I work in the memory…
Experience
Pre Silicon Verification Engineer
May 2022 — Present · US
Set up an entire UVM based testbench for BFM in active and passive modes which is the initiator of memorytransactions as a part of DDR memory stack in SOC team. This Testbench was reused by higher stacks too Coding of UVM sequences for memory read/write transactions and debug using waveforms Verification of its interface using various testcases and constrained randomization Modelling power management and security signals using UVM testbench as a part of DDR I/O Die to Die team Worked on enabling assertions and waveform debug for each failing assertion
Education
Thakur College of Engineering & Technology Shaymnarayan Thakur Marg
Bachelor of Engineering - BE, electronics
2015 — 2019
Portland State University
Master's degree, Electrical and Electronics Engineering
2020 — 2022
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