Abhishek Soni

About Abhishek Soni

Digital Design and Test (DFT) Engineer with extensive experience in scan insertion, ATPG, STA, and DFT architecture for complex SoCs and automotive applications. Skilled in leading cross-functional teams, optimising DFT flows, and ensuring compliance with industry standards. Proven ability to automate design processes, improve test coverage, reduce pattern count, and enhance test time efficiency. Proficient in a wide range of EDA tools and programming languages.

Experience

1. Senior Lead Dft Engineer

   Qualcomm

   Dec 2025 — Present · Bengaluru, IN

   Scan Implementation TeamResponsibilities:1. Owned and executed complete Scan implementation activities, including the insertion of DFT Scan IP (SSH, EDT/CODEC, OCC), scan stitching at the gate level (wrapper identification, DFT scan DRC), test point insertion, and ICL extraction.2. Collaborated with cross-functional teams (RTL design, Power, Synthesis, Timing, and PD) to manage multiple requirements and collaterals, such as DFT timing constraints, formal verification constraints, power collaterals, scandef, pre-placement and ECOs.3. Ensured ATPG quality by generating and validating ATPG patterns across multiple modes (SAF, TDF, IDDQ, DFD) to achieve coverage and test time targets.Test STA TeamResponsibilities:1. Owned and executed HSTA Correlation runs (SOC - Subsystem Correlation through TimeVision) for 6 subsystems across 2 projects, ensuring accurate and efficient timing analysis.2. Analysed and summarised reports across multiple design stages - CTS, PRO, BTO, and MTO - to ensure issue-free handoffs and design integrity.3. Performed in-depth scan path analysis by correlating timing session data with scan cell reports to identify and resolve potential bottlenecks.

Education

• Nirma University

  Bachelor of Technology - BTech, Electronics and Communication Engineering

  2016 — 2020

• Kendriya Vidyalaya

  CLass XII, PCM

  2014 — 2015