Abhishek Jain
Group Manager | Member of Technical Staff | PhD
- Role
- Group Manager Smart Power Technology Design Enablement and Ip Design at STMicroelectronics
- Location
- North Delhi, DL, IN
- LinkedIn followers
- 500 followers
About Abhishek Jain
VLSI design professional having more than 19 years of experience within one of the semiconductor industry leader STMicroelectronics. My mission is to drive innovation in smart power technology design enablement and IP design space, leveraging my expertise in digital and analog circuit designs and methodologies to contribute to our organization\'s cutting-edge solutions. I have constantly strived to keep myself updated with latest technology trends by learning new concepts and methodologies. Currently, I lead a team of more than 30 young VLSI professionals dedicated to enabling IP and SoC designs on smart power technologies. This involves delivering of eNVM memory IPs, Low Power IPs, Implementation Flow Kits design support, RadHard qualification of techno platforms and IPs, ensuring the successful silicon validation of our products and CAD-Silicon alignment, I mainly focus on team development, quality project deliveries, innovation in design and automation, interactions with various actors like EDA partners, cross-functional teams, customers etc. I\'m committed to fostering a culture of excellence and collaboration, bringing diverse perspectives to enhance my team\'s creativity and impact.My research interests and competence areas include Robust (functional Safe), Reliable and Adaptable System designs and methodologies, and leveraging the potential of artificial intelligence in digital and analog design space.
Experience
Group Manager Smart Power Technology Design Enablement and Ip Design
Aug 2005 — Present · Noida, IN
Education
Indian Institute of Technology, Kanpur
Specialization (Short Certificate Course), AIML Core : Deep Learning Specialization
Kendriya Vidyalaya
Primary, Secondary and Senior Secondary Education, Science
1989 — 2001
Università degli Studi di Padova
Doctor of Philosophy - PhD, Radiation Hardened Circuit Design
Netaji Subhas Institute of Technology
BE, Electronics and Communication Engineering
2001 — 2005
Skills
- Silicon Debug
- Tcl
- Analog
- Mixed Signal
- Circuit Design
- Integrated Circuit Design
- Logic Synthesis
- Debugging
- Static Timing Analysis
- Cadence Virtuoso
- Low-Power Design
- Digital Design
- Analog Circuit Design
- Verilog
- Primetime
- Physical Design
- Perl
- Embedded Systems
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