Abhiram Kakarlapudi

SoC Implementation | Methodology

Role
Principal Design Engineer at 恩智浦半导体
Location
Hyderabad, TG, IN
LinkedIn followers
500 followers

About Abhiram Kakarlapudi

With over 20 years of experience in VLSI design, I currently serve as Principal Design…

Experience

  1. Principal Design Engineer

    恩智浦半导体

    Aug 2020 — Present · Bengaluru, IN

Skills

  • Tcl
  • Logic Synthesis
  • C
  • Static Timing Analysis
  • Rtl Design
  • C
  • Asic
  • Soc
  • Systemverilog
  • Vhdl
  • Digital Ic Design
  • Perl
  • Verilog
  • Vlsi

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Abhiram Kakarlapudi — Principal Design Engineer at 恩智浦半导体 in Hyderabad, TG, IN | Unifers