Abhinaya Kalyana Sundaram
Senior Verification Engineer @NVIDIA
Austin, TX, US
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MOBILE NUMBERS
+91 *********19
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WORK HISTORY
Feb 2023 — Present
Senior Verification Engineer @NVIDIA
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Austin, TX, US
DGX FPGA Verification
EDUCATION
2013 — 2015
The University of Texas at Dallas
Master's degree, Electrical engineering
2008 — 2012
College of Engineering, Guindy
Bachelor's degree, Electrical, Electronics and Communications Engineering
SKILLS
MicrocontrollersOpen Verification MethodologyVhdlPerlModelsimMatlabXilinx IseUniversal Verification Methodology (Uvm)VlsiVery-Large-Scale Integration (Vlsi)OvmSynopsys ToolsSpiceCadenceVerilogHspiceCXilinxSystemverilogLabviewCadence VirtuosoPower Management
ABOUT ABHINAYA KALYANA SUNDARAM
Experienced Design Verification Engineer with a demonstrated history of working in the semiconductors industry. Skilled in SystemVerilog, Verilog, Perl, SPICE, LabVIEW, Xilinx ISE, and Universal Verification Methodology (UVM). Strong quality assurance professional with a Master\'s degree focused in Electrical engineering from The University of Texas at Dallas.
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