Abhinaya Katta
Staff Engineer @Arm
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WORK HISTORY
Staff Engineer @Arm
Cambridge, GB
EDUCATION
BITS Pilani Hyderabad
Master's degree, Embedded Systems
Jawaharlal Nehru Technological University
Bachelor's degree, Electrical, Electronics and Communications Engineering
Narayana Junior College
Intermediate, MPC
SKILLS
ABOUT ABHINAYA KATTA
Expertise in FPGA and ASIC based SOC IP designs.• End to End flow experience of FPGA design and validation. • In-depth knowledge of Xilinx FPGA Clocking, XPHY and SYSMON blocks. • Experience in working on RDMA NIC (InfiniBand)• Hands on experience in overall IP design cycle starting from Architecture to validation• Expertise in system integration, system level simulation, debug using Xilinx tools, boards, and IPs.• Developed User Interfaces for IP’s using TCL Scripts• Expertise in Xilinx Soft IP cores, Analog Mixed Signal blocks on Xilinx FPGAs.• Experienced in implementing Serial Protocols (like I2C, SPI, UART, Flexi Bus Interface).• Have good knowledge of Digital circuits, Digital Signal Processing, digital Communication, and digital filters.
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