Abhijeet Khobragade
Standard Cell Library Characterization | Standard Cell Layout Design | SiliconSmart | PrimeSim | FineSim | NLDM | CCS | LVF | PPA | SoC Design Engineer
- Role
- Standard Cell Library Characterization at Intel
- Location
- Bengaluru, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Abhijeet Khobragade
Engineer experienced with Standard Cell Library Characterization and layout Design of…
Experience
Standard Cell Library Characterization
Jan 2019 — Present · Bengaluru, IN
Skills
- Layout Versus Schematic (Lvs)
- C
- Lvs
- Rtl Design
- Analog
- Cadence Spectre
- Electronics
- Asic
- Debugging
- Design Rule Checking (Drc)
- Semiconductors
- System on a Chip (Soc)
- Vhdl
- Eda
- Physical Verification
- Simulations
- Systemverilog
- Perl
- Field-Programmable Gate Arrays (Fpga)
- Cadence Virtuoso
- Static Timing Analysis
- Vlsi
- Xilinx
- Cadence
- Spectre
- Verilog
- Physical Design
- Soc
- Very-Large-Scale Integration (Vlsi)
- Drc
- C++
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