Behin A

About Behin A

Senior FPGA Design Engineer with 11+ years of development experience. My expertise includes FPGA/ASIC RTL design (requirement analysis, architecture specification, RTL coding, multi clock design, CDC, design simulation, implementation, timing analysis and closure, hardware testing and TCL scripting). I also have hands-on experience in ASIC emulation in FPGA. Being familiar with a variety of FPGA families and vendor tool flows (Xilinx, Microsemi, Lattice & Altera), I have contributed to the successful realization of various projects in Embedded, AI/Machine learning, Signal processing, Communication & Networking, Network security and defense & aerospace applications. I have also led a small team of designers handling multiple FPGA & ASIC project developments. I love learning new technologies, resolving complex problems and implementing new ideas that benefit humanity. In my free time, I go trekking, play badminton, listen to music, try some artwork and also go swimming.

Experience

1. Mts Product Application Engineer

   AMD

   Jun 2024 — Present · Hyderabad, IN

Education

• CSI INSTITUTE OF TECHNOLOGY

  Bachelor of Engineering (BE), Electronics and Communications Engineering

  2009 — 2013

• Yettacode Higher Secondary School

  Higher Secondary, Maths Biology

  2007 — 2009

• Birla Institute of Technology and Science, Pilani

  Master of Technology - MTech, Embedded Systems