Aatreya Chakravarti

Architecture ASIC / System Engineer, Marvell Technology Group

Role
Architecture Asic System Engineer (Analog Io) at Marvell Technology
Location
Winooski, VT, US
LinkedIn followers
500 followers

About Aatreya Chakravarti

Graduated with a Masters in Electrical and Computer Engineering from Worcester Polytechnic Institute (WPI). My graduate research was in the Integrated Circuits and Systems (ICAS) lab where I worked on the design and measurement of ICs for biomedical applications. At Marvell, I work for the ASIC Custom Engineering Solutions team to design ICs for various applications.

Experience

  1. Architecture Asic System Engineer (Analog Io)

    Marvell Technology

    Dec 2021 — Present · Burlington, VT, US

    ASIC Custom Engineering Solutions Team

Education

  • Worcester Polytechnic Institute

    Master of Science - MS, Electrical and Computer Engineering

    2020 — 2021

  • Worcester Polytechnic Institute

    Bachelor of Science - BS, Biomedical Engineering

    2015 — 2019

  • UC San Diego

    Master of Science - MS (Transferred), Electrical Engineering, Circuits & Systems

    2019 — 2020

  • Dhahran High School

    High School

    2011 — 2015

  • Worcester Polytechnic Institute

    Bachelor of Science - BS, Electrical and Computer Engineering

    2015 — 2019

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Aatreya Chakravarti — Architecture Asic System Engineer (Analog Io) at Marvell Technology in Winooski, VT, US | Unifers