Aakash Nasa

About Aakash Nasa

I am currently a graduate student at the University of Southern California pursuing MS in Electrical Engineering (Computer Architecture). I have worked in Qualcomm for two years as a Design For Test Engineer involving ATPG simulations, simulation debugging, PAGLS (Power Aware Gate Level Simulations) simulations, Power Down sequencing and TDF (Transition Delay Fault) pattern generation along with PLL bring-up and related activities.I am a self motivated confident person who likes challenging environment as it brings out the best in me. I believe in a quote that has guided me over the years \"IF YOU BELIEVE YOU CAN OR YOU BELIEVE YOU CANNOT THAT IS WHAT DEFINES YOU AND THAT IS WHAT MAKES YOU SUCCESSFUL\". So to believe something is equivalent to making it happen. I have a flexible personality and diversified skill set as I have work experience in all the domains be it a startup or an Electronic IT Firm or industry. I have graduated from Thapar Institute of Engineering and Technology (TIET) in Electronics (Instrumentation and Control) Engineering with a final GPA of 9.21/10 and have been awarded scholarships for being second position holder for two consecutive years based on CGPA.

Experience

1. Gpu Dft Design Engineer

   Apple

   Jun 2023 — Present · Austin, TX, US

Education

• Thapar Institute of Engineering & Technology

  Bachelor of Engineering - BE, Electronics and Instrumentation Engineering

  2014 — 2018

• University of Southern California

  Master of Science - MS, Electrical Engineering