Bollineni Srinivasulu
Design Methodology Engineering Manager at Intel Corporation
- Role
- Design Methodology Engineering Manager at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Design Methodology Engineering Manager
Jan 2021 — Present · Bengaluru, IN
Education
A.P.R.School, Ganapavaram
Schooling, State Board of Andhrapradesh
2002 — 2005
Narayana Junior College
Intermediate, M.P.C
2005 — 2007
Gudlavalleru Engineering College
Bachelor of Technology (B.Tech.), Electronics and Communication Engineering (ECE)
2007 — 2011
Birla Institute of Technology and Science, Pilani
Master's degree, Microelectonics
2013 — 2015
Skills
- C++
- Soc
- Uvm
- Rtl to Gdsii Flow
- Asic
- Vlsi
- Xillinx Ise
- Cadence Encounter
- System Verilog
- C
- Programming
- Skill Programming
- Verilog
- Perl
- Axi4 Protocol
- Microsoft Excel
- Powerpoint
- Simulink
- Cadence Virtuoso
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